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Analog / Mixed Signal Examples
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* H( j/ U. b+ n. p. `" H9 ]Behavioral Models of ADCs
; B S. N) }: H6 R\ams\sampling\; sampling_101;
0 V7 O3 T# B- x3 W4 q/ b' l Sigma-Delta ADC 1st order modulator $ cd \ams\adc\; dspsdadc2;
$ v9 O" t8 D, `* A4 v1 g8 R& V Sigma-Delta ADC 2nd order modulator $ cd \ams\adc\; dspsdadc3; ( i: r. X* ~2 S( n" ?4 n
Sigma-Delta ADC 2nd order modulator discrete time (switched capacitor prototype) $ cd \ams\adc\; dspsdadc4; ) g5 o7 h! I V1 Z% d
) e& T# l4 \& Y5 r, {Behavioral RF) |" \ ]5 e2 N: n3 |9 ^
Measurement of Lowpass Filter Freq Response $ cd feed_fwd_2;3 S7 D( ^! h2 A u( S
+ |6 B1 G! z" m( A9 mPLLs - K5 L' w# S/ e& Z T( E! V
VCO with phase noise $ cd , ?$ J/ u6 j# P4 w* @; L6 E* o
Pll with freq domain instruments $ cd \ams\pll;
& t2 C4 Y* S6 t* I6 t: { Pll fractional with analog compensation $ cd \ams\pll; 1 M: n' |% |2 r9 ^" P
Pll fractional with digital compensation $ cd \ams\pll;
, Y# J% [% q+ D( _; U$ o, ?* g* b Pll optimization (Nonlinear Control Design) $ cd \ams\pll;
' M- H8 m$ E5 S: o" l1 M% n8 M Carrier and Symbol Timing Recovery (NCO->ADC) $ cd \ams\pll; carrier_timing;
# B+ D; b0 V- u: H) G f& k# I Carrier and Symbol Timing Recovery (Fractional Delay) $ cd \ams\pll; timing_recovery_1; |
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