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Sponsor& l4 U* c/ U+ ?
Test Technology Standards Committee of the IEEE Computer Society" F3 C$ w' d3 Q, n! d- w! Z0 b
Approved 14 June 2001
6 y8 m# w3 N; K0 K! `& |$ {IEEE-SA Standards Board
9 ~. E, K/ X$ a6 z6 bAbstract: Circuitry that may be built into an integrated circuit to assist in the test, maintenance, and/ J" C/ v5 z: k" Y
support of assembled printed circuit boards is defined. The circuitry includes a standard interface+ F- f3 x; b+ }: N- \, ^3 O
through which instructions and test data are communicated. A set of test features is defined, n1 o) _4 X% @; F2 c, j
including a boundary-scan register, such that the component is able to respond to a minimum set
. }# |' h8 n9 }$ y# Z$ t3 v( Mof instructions designed to assist with testing of assembled printed circuit boards. Also, a language+ x1 R3 ~, r3 g% U& g* b
is defined that allows rigorous description of the component-specific aspects of such testability features.+ L/ H) y3 h" k, x' ~( d& ^, Q( Y
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Keywords: boundary scan, boundary-scan architecture, Boundary-Scan Description Language,
$ Z/ _) @9 _0 U+ l6 d+ k5 p+ [# Oboundary-scan register, BSDL, circuit boards, circuitry, integrated circuit, printed circuit boards,
1 p5 S0 v( g. {, sTAP, test, test access port, VHDL, VHSIC Hardware Description Language
. Q5 {8 ^8 i: U1 Z" ^ T# [6 g/ k% T0 e6 _1 W- s0 Q+ X% Q* f1 J
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