IEEE Std 1149.1-2001 Test Access Port and Boundary-Scan Architecture

michaldl

Sponsor
7 }( K/ D) G7 {" S3 fTest Technology Standards Committee of the IEEE Computer Society
Approved 14 June 2001
) |: K' ?$ q* Z! i4 B$ m1 l4 w% W2 EIEEE-SA Standards Board
- ~  h, i0 T1 z1 u0 _2 [7 w$ ?Abstract: Circuitry that may be built into an integrated circuit to assist in the test, maintenance, and
! Q; h7 E2 ?- [5 Ssupport of assembled printed circuit boards is defined. The circuitry includes a standard interface
% L8 ^, `9 R0 zthrough which instructions and test data are communicated. A set of test features is defined,
including a boundary-scan register, such that the component is able to respond to a minimum set
1 f- c. T$ ~9 o5 z8 w% y$ m6 Jof instructions designed to assist with testing of assembled printed circuit boards. Also, a language
- t' i( J* a6 yis defined that allows rigorous description of the component-specific aspects of such testability features.

Keywords: boundary scan, boundary-scan architecture, Boundary-Scan Description Language,
boundary-scan register, BSDL, circuit boards, circuitry, integrated circuit, printed circuit boards,
TAP, test, test access port, VHDL, VHSIC Hardware Description Language
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