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Job Title :Analog Design Engineer3 {- n$ A- f+ ?# b6 C6 v. y
Job Category :Semiconductor
- W" P# j" c/ ]! u- M- s- NLocation : Malaysia k. o& d, \2 O9 J
Job Type : Permanent
# E* f# K% ]* }3 S: V0 dJob Description:; B7 X8 c" l4 V, X* x% N R( i# D9 D. f
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Analog IC Designer to for all technical aspects of design from feasibility to specification to monitoring layout of the design, tapeout and silicon validation.' [. S3 @- f: h. O
& s% [# @4 W; m6 xResponsibilities:4 f1 {! n/ O5 w% Y( c# p
Interaction with customer to understand customer requirements, develop product specification and to provide technical support.
4 R3 `: @& {: }" @( x5 W' EClose interaction with the design team.4 k8 K" l! F E5 w
Support and guide the layout team. Proper documentation will have to be provided throughout including a detailed test plan for the validation of the design/IP.- t. O2 z" a; f( c" J) E
Maintain proper documentation throughout projects including a detailed test plan for the validation of the design/IP.
( B" H' s/ a' u _7 F+ G+ S4 sRequirements:
6 c- H: H! [8 I" w! SIn-depth understanding of leading process technologies such as sub-micron CMOS/BiCMOS/DMOS, BCD, HV' h Q- T3 K/ J9 L$ u% x4 y
Experience with simulation tools required to efficiently simulate analog/mixed-signal circuits e.g. Spectre, Ultrasim, HSpice etc/ H& r9 c: S5 r' b' A5 W( j" \
Understanding of simulation models, design rules and verification procedures (DRC/LVS/ERC) is essential.
k2 e5 [: N" v. eDetailed knowledge in the design and operation of the following analog blocks:
5 y1 {; f9 m. A+ d W, X- Basic analog building blocks (op amps, comparators, current sources, current mirrors, voltage references)
6 i& F: l/ O8 O) O6 X- Power management blocks (bandgap references, linear regulators, DC-DC converter of various topologies, LDOs)
! s* F/ h9 C* w% I! z+ ]3 }- System level protection blocks (UVLO, POR, OTP, Short circuit protection etc)% E3 q9 p( Q2 A# F: H
- PLL and transceiver blocks (output drivers, multiplexer and de-multiplexer, clock generator, equalizers, clock and data recovery, frequency detectors, oscillators, filters)
2 L" H) H$ J2 l) m! h- ADCs and DACs# o5 @* ~( D3 p' u
Experience with design practices such as minimizing device mismatch, noise, signal coupling, ESD, latchup and device SOA is a must.6 e) z& k$ F0 h+ B
Modelling and design skills in Verilog-A/Verilog-AMS and system modelling with Matlab is an added advantage.
- ~& x& [! ~+ u* C# S; ?A track record as a team player and capable of leading teams
1 e5 r5 S( U& g! |: oProven experience in developing and meeting engineering schedules7 `0 |: N5 c) z- f: n" K2 o' b9 _+ t
Strong analytical skills
% f. |# W; \: i6 j/ o) `' LStrong organizational, interpersonal, written and verbal communication skills. |
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