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Job Title :Analog Design Engineer% a4 K; B) N% Q* C( N
Job Category :Semiconductor0 o+ E6 n, |: @/ V& Q0 x1 S1 a
Location : Malaysia
4 B# J2 V& H9 X t4 _* mJob Type : Permanent9 v# K! ^3 l6 y& ?- g
Job Description:
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. C5 `$ }/ b K" W2 |' A1 jAnalog IC Designer to for all technical aspects of design from feasibility to specification to monitoring layout of the design, tapeout and silicon validation.3 n: ^/ P7 Z8 ]; \) V7 N
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Responsibilities:
5 F. }- y/ P$ q. O7 a! B% Q& `6 VInteraction with customer to understand customer requirements, develop product specification and to provide technical support.5 A( c- E6 a5 _* P& i5 G5 w/ M
Close interaction with the design team.' q$ A* m# f4 y/ t) F0 M0 m
Support and guide the layout team. Proper documentation will have to be provided throughout including a detailed test plan for the validation of the design/IP.
' c g, ?: R7 G' t6 w, zMaintain proper documentation throughout projects including a detailed test plan for the validation of the design/IP.7 j$ m% W5 M) n, Q2 l
Requirements:& Y7 i& n: h7 C) r
In-depth understanding of leading process technologies such as sub-micron CMOS/BiCMOS/DMOS, BCD, HV9 y! L% A: a7 j) S, q3 a
Experience with simulation tools required to efficiently simulate analog/mixed-signal circuits e.g. Spectre, Ultrasim, HSpice etc. E8 m3 G" s( w/ k
Understanding of simulation models, design rules and verification procedures (DRC/LVS/ERC) is essential.
1 ] U$ X0 l' R& g6 m- XDetailed knowledge in the design and operation of the following analog blocks:, g5 Z9 B5 B4 H. R: _
- Basic analog building blocks (op amps, comparators, current sources, current mirrors, voltage references)3 ~1 e% @+ g; }, b/ _' j1 A+ ^
- Power management blocks (bandgap references, linear regulators, DC-DC converter of various topologies, LDOs)
F. A/ P k+ C# G& J5 _- System level protection blocks (UVLO, POR, OTP, Short circuit protection etc): @. \4 W! o- I/ T6 H) t
- PLL and transceiver blocks (output drivers, multiplexer and de-multiplexer, clock generator, equalizers, clock and data recovery, frequency detectors, oscillators, filters)
) ~: \) [4 ^* ~- N$ u- ADCs and DACs5 B$ ~+ d) c9 a: U5 I# N
Experience with design practices such as minimizing device mismatch, noise, signal coupling, ESD, latchup and device SOA is a must.
* b+ H q3 m/ {; `( P0 S- bModelling and design skills in Verilog-A/Verilog-AMS and system modelling with Matlab is an added advantage.
9 `+ J1 n* M) ?0 l: m% {7 ~A track record as a team player and capable of leading teams& N% R, N3 H, M& Z
Proven experience in developing and meeting engineering schedules
7 N; v- z3 t. X+ L. f* wStrong analytical skills- n; c: { [+ t3 w
Strong organizational, interpersonal, written and verbal communication skills. |
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