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[問題求助] 使用暫態分析模擬出phasenoise @ MMSIM701

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1#
發表於 2009-8-27 02:01:53 | 只看該作者 回帖獎勵 |倒序瀏覽 |閱讀模式
原文連結8 [3 H6 A0 @2 _8 l5 x1 A/ x
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以下原文內容:
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0 j# h6 S5 ?) g& xCalculating Large Signal Phase Noise Using Transient Noise Analysis) p6 J$ k4 z9 U8 `
By Alan Whittaker on March 26, 20098 S( Y( a* G/ u  I* k0 x8 l

" K# [5 @- X* ?& S6 H! bMy name is Alan Whittaker and I'm in Cadence's Custom IC Proliferation Group.  
; b+ r+ X, C* oWe support Cadence's Technical Field Organization (the AEs) and Cadence customers
# X7 L$ j6 I9 n% f$ ^during the introduction and adoption of new and advanced EDA technologies.  I'll
. p& B3 n; `) n! A! T, Mbe posting here from time to time on methodologies and tool features that
0 F' }. U! s* x6 h, |+ O: bresolve issues that users have run into during the front-end analog, RF and
- _$ Z% c" j2 h4 Q% ^mixed-signal design process.
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I'm first going to address how you can perform a large-signal phase noise & B5 m: t* B! {4 Z3 O$ ~
analysis on a design block such as a VCO using our transient noise analysis ! o# ]6 b  A  R( _5 _( U
capability in our Spectre circuit simulator.  This approach is in addition to
! i+ ^" E9 m1 n* d3 T+ i8 a* Z  Hour small signal phase noise analysis which is available using either pnoise   ?2 Q; _4 P, h. b
or hbnoise analysis in the SpectreRF option to Spectre.
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/ t7 k. J- T/ t4 n" N( l# K& wHere are the steps to obtain a phase noise plot from transient noise analysis:! x( `4 p* Z& Q! e( ]5 {; h

& ?( U5 I& {7 p1.  Set up your oscillator testbench circuit for a transient noise analysis 8 w+ L. t/ ~- D
(See sourcelink for the Transient Noise appNote - it doesn't discuss the phase
  E$ U2 r+ P# h- z+ bnoise measurement, but describes how to properly set up the simulation analysis
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( C; D* S) W6 v2.  Add the block freq_meter from the pllMMLib library ; k3 x% P* S( ?+ _" D: _! f
($CDSHOME/tools//dfII/samples/artist/pllMMLib) 0 V) h% h  S: t7 u, b
to the testbench circuit. Important: The instance name for this block must be 7 t7 N" N) f: y3 ~; E
'vco_freq'.
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- W8 X1 R6 U# p" N0 JIf the oscillator output is differential, connect it to the vin_p and vin_n   b  `# S6 f. [& _  W0 n/ O+ [" D+ S
pins on the freq_meter block. If the oscillator output is single ended, connect * T; s" B/ Q3 g
it to the vin_p pin and connect the vin_n pin to ground. Connect a noConn cell
, q% {- M2 I) B. l" hfrom the basic library to the out_freq pin.
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2#
 樓主| 發表於 2009-8-27 02:07:34 | 只看該作者
The parameters for this block are (set Tools Filter to veriloga in the CDF ' f9 @; o8 r. P; i# G8 F* q
parameter form:
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3 A2 }; I2 l4 v8 {6 m      Vthup: Threshold voltage to determine the rise edge of the input waveform.
7 P) B3 \* P& t/ u9 I, [, HThe input waveform period is determined by two adjacent rise edges. Default is 0. 9 ^' a9 O& ^% p( K+ O9 r9 M. {
    *
3 w0 Z- b- {0 n4 C/ G$ ~      ttol: The tolerance of the time where the rise edge is determined. Default 2 \: o* Z) h- o3 P
is 1p.
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      outStart: The time-dependent period of the input waveform is output to the ' X7 Z% {: Q4 p( M6 }3 C
file when the time is greater than outStart. Default is 0. To get accurate phase
# E0 M' Y! Q  @6 `, X0 anoise measurements, set this to past the time when the oscillator is fully
1 z6 j/ }# p8 J9 {powered up and oscillating at the design frequency.
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( q5 r* v( R: C      outfile: The name of a file to contain time-dependent periods for use in 9 B& X5 c- r6 e5 ~" m
later psd calculations. Specify just the file name, not a path. If outfile is
" U1 _9 L  L/ D9 q/ a+ lleft blank, the default name is periods.txt.
3#
 樓主| 發表於 2009-8-27 02:11:04 | 只看該作者
3.  Before starting the simulation, in the ADE window, Select Tools->RF->LL. In the PLL Macro Model Wizard window, enable PLL Macro Model and select PLL Bench as the Bench Type. Then OK this form.7 k9 G8 X) X9 ~" U/ g

1 h/ u: F4 g' z2 {& d4.  Run the simulation. The simulation must run successfully to completion in order to get to the phase noise results.
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/ t: r8 Y; I! S( F5 D5.  In the Direct Plot form for transient noise there should be a PLL PSD Noise option. This will allow you to plot the phase noise results. If a message appears saying that the PLL Noise PSD data is not available, check steps 3) and 4). If you make any corrections, you will need to re-run the simulation.
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The phase noise plot will extend from fmin = 4/tstop to fmax = fosc/2, where tstop is the transient noise simulation stop time and fosc is the oscillation frequency of the circuit.
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Important note: You will need to use MMSIM701 and IC5141USR5 or IC613 (or latersubversions) to obtain a phase noise plot from transient noise analysis.$ S5 H2 q8 [& Q' J

& M2 n2 g4 Z; H( c3 _1 p我用的是mmsim620,也不能模。有人可以模擬出來的回個文,show個圖給大家看吧
4#
發表於 2009-9-24 17:41:38 | 只看該作者
show you my simulation result+ {. G" D( }0 W/ c
!!!
; O& J: o4 U6 R4 D5 z!!!!!!!!!!!' L/ d! ?+ K% [$ }
!!!!!!

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5#
 樓主| 發表於 2009-9-25 16:46:23 | 只看該作者
謝謝你的回覆,我最近拿到新的軟體也開始在測試mmsim7了' S) D  J$ i4 K. c2 n% s" u
我發現turbo與multi thread的設定不同會對結果造成很大的不同。8 G* a" @, v! _2 X) b6 r0 \$ _- }1 a; w
還有這個phase noise的訊號的範圍跟transient noise的設定與transient 的設定都有很緊密的關係。: t4 f; c/ r5 d1 L
不知道該怎麼作設定才是比較準確的
6#
發表於 2011-5-6 00:39:50 | 只看該作者
請問有更詳盡的使用方法嗎
7#
發表於 2011-5-26 15:02:19 | 只看該作者
也去试试这个流程。关于pll相噪仿真还有其他方法吗?
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