|
【工作內容】
( P# }1 z& @' s6 e先進製程與模組開發 (DRAM/ Flash/ Logic)
/ L `6 b t" V( i) i) U' b- Photolithography (e-beam, EUV, OPC/RET, Photo Resist Materials),
( w% T" `8 w2 B3 q$ V Dry Etch, Cleaning & CMP, Diffusion, Ion Implantation, Metallization,4 P# G5 W, X, U* v, q' K4 r- }2 R
Metrology & Inspection, etc.
" \3 }% x) [7 @# G+ M g' F- Device Isolation, Transistor, Capacitor, Dielectric
, F! k8 p. z" V, E) f1 ]4 K6 b7 w- High-K/Metal Gate, SiO2/SiON Gate Dielectric& b) D( w y$ J3 ^1 d4 N! @
- Low-K, Interconnect, etc.
* Y7 ?* C0 @, l% p2 `. Q w※ OPC: Optical Proximity Correction (Comput. Litho)/ K# W1 z3 s5 t; E, G& V! v( J
MPC: Mask Process Correction# |# `7 Y% a3 x: E& m; Q
8 a$ g0 X' z, M) F
FEOL/BEOL 製程整合 (DRAM/ Flash/ Logic)/ W5 x D: Y# |+ {
新型記憶體: PRAM, STT-MRAM, ReRAM
4 Y( i8 n, t$ G5 @TCAD/ECAD
. I' Q: Q& ^3 t- Process & Device/Material Modeling, Circuit Compact/Reliability Modeling
]% x; E' c$ G" j- j& Q- Circuit Simulator Development
( K, M1 e# F- r/ O- System-Level Modeling/Simulation, Virtual Platform, HW/SW Co-Design2 L& `+ F" t! {
- Simics/CoWare/SOC Designer UserMemory Controller/Memory Architecture/
9 y! M. j" K8 c4 {3 X SSD Research Experience |
|