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【工作內容】/ }5 _* M. ~5 C, N; ^
先進製程與模組開發 (DRAM/ Flash/ Logic)
& ] w% G6 \0 E1 U) [) H7 r1 I* h- Photolithography (e-beam, EUV, OPC/RET, Photo Resist Materials),
1 g2 H4 N6 t# K Dry Etch, Cleaning & CMP, Diffusion, Ion Implantation, Metallization,
4 r0 S7 \, E/ \' K Metrology & Inspection, etc.
' m6 a2 ?/ f* R' }- Device Isolation, Transistor, Capacitor, Dielectric, \4 U+ U$ |+ \0 |( z) \. i+ r4 Q
- High-K/Metal Gate, SiO2/SiON Gate Dielectric8 w; E) t/ y( d, u! ]" i) p, v
- Low-K, Interconnect, etc. G2 f2 A, r' Q: c; X/ `) [) H
※ OPC: Optical Proximity Correction (Comput. Litho)4 \$ X$ W# J' y. _ W5 I
MPC: Mask Process Correction
- g: b$ x& j0 R v* b
% V1 O+ w& n+ C1 R! |# G' OFEOL/BEOL 製程整合 (DRAM/ Flash/ Logic)# x. }# K0 b, J# k3 d$ _* @% s
新型記憶體: PRAM, STT-MRAM, ReRAM) \4 ^) @6 g0 S" Y4 ~3 v
TCAD/ECAD- v; T" m- [. X
- Process & Device/Material Modeling, Circuit Compact/Reliability Modeling
3 v3 `- g- ~6 Z; f9 I2 ~- Circuit Simulator Development
7 S1 h: b) e+ ]% s& A/ I- System-Level Modeling/Simulation, Virtual Platform, HW/SW Co-Design6 {2 f' ] Y4 |; i
- Simics/CoWare/SOC Designer UserMemory Controller/Memory Architecture/
2 v3 B% b" V' D) {8 g/ a# c0 M SSD Research Experience |
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