Cortex-M0+ IP Core

sinoicboy

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# X( v0 K' W3 Y3 R- F1 a( liconstart@gmail.com
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                                  AR085-DA-70000-r0p0-03rel0/
                                  AR085-DA-70000-r0p0-03rel0/doc/
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* X6 ^2 V" P% k  m1 e  s4af79e0557cc9c6863c2eab0f890aaad  AR085-DA-70000-r0p0-03rel0/doc/ARMv6-M_architecture/DDI0419C_arm_architecture_v6m_reference_manual.pdf
                                  AR085-DC-11001-r0p0-04rel0/
, d7 ?# I5 ?$ A% d1 F                                  AR085-DC-11001-r0p0-04rel0/doc/
8 b# L- V; m9 r6 l- {                                  AR085-DC-11001-r0p0-04rel0/doc/errata/
57ce61d69a56fae9dff02a664dc0930a  AR085-DC-11001-r0p0-04rel0/doc/errata/ARMv6-M_Architecture_Errata_List.pdf
$ i& l1 A: A; t3 `- @5 m; s                                  AT590-BU-11001-r0p1-00rel0/
( M2 V+ u! t" R( t6 r3 ^b2bb2db05b71fa9e2ecd4c2841c22f3f  AT590-BU-11001-r0p1-00rel0/Cortex-M0+_Product_Errata_Notice_v4.pdf
d305236940b52b92b81e8579435efe7e  AT590-BU-11001-r0p1-00rel0/Cortex-M0+_Software_Developers_Errata_Notice_v4.pdf
6 D" c" r0 T% D& r1 Y' q5 R5 {2d80706f7a099ac4a9674908c50d730e  AT590-BU-11001-r0p1-00rel0/AT590-BU-11001-r0p1-00rel0.lst
                                  AT590-BU-50000-r0p1-00rel0/
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                                  AT590-BU-50000-r0p1-00rel0/logical/
                                  AT590-BU-50000-r0p1-00rel0/logical/cm0p_dap/
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80fe9cfaeb5e260f70aebfcac0bdf888  AT590-BU-50000-r0p1-00rel0/logical/cm0p_dap/verilog/cm0p_dap_dp_cdc.v
063cdb1c994aca1f31971a3d52da426d  AT590-BU-50000-r0p1-00rel0/logical/cm0p_dap/verilog/cm0p_dap_dp_sw_defs.v
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  |; f1 [. ?7 J+ @( Z12e85d89d377ef33f7a41f5f49bf20f0  AT590-BU-50000-r0p1-00rel0/logical/cm0p_dap/verilog/cm0p_dap_dp_jtag.v
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3ffb32cddb6a7e19f9f91e437f7ca59b  AT590-BU-50000-r0p1-00rel0/logical/cm0p_dap/verilog/CM0PDAP.v
75d1d91ab79ae9e0e044ed1ef71cf03e  AT590-BU-50000-r0p1-00rel0/logical/cm0p_dap/verilog/cm0p_dap_dp_sw.v
                                  AT590-BU-50000-r0p1-00rel0/logical/cortexm0plus/
                                  AT590-BU-50000-r0p1-00rel0/logical/cortexm0plus/verilog/
9 g3 L( T, Q6 f; X. a3 Z) [95d54f552eade07ede322600da1f95c3  AT590-BU-50000-r0p1-00rel0/logical/cortexm0plus/verilog/cm0p_dbg_bpu.v
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c00549e61aae47696609028230712dd6  AT590-BU-50000-r0p1-00rel0/logical/cortexm0plus/verilog/cm0p_dbg_ctl.v
, W5 a6 i. u) H$ q% M, f0 {6 N$ Jed481eab3481c71d4e2dc94531b88a3d  AT590-BU-50000-r0p1-00rel0/logical/cortexm0plus/verilog/cm0p_nvic.v
- o6 m3 F" V$ J: L  X1 t+ F57a19fb958028b39c425e6ac68f882aa  AT590-BU-50000-r0p1-00rel0/logical/cortexm0plus/verilog/cm0p_top_sys.v
66bc815f02ad900042cec326a6679963  AT590-BU-50000-r0p1-00rel0/logical/cortexm0plus/verilog/cm0p_dbg_dwt.v
62d60f5f2bceb3ce3f82e8fcb48446ff  AT590-BU-50000-r0p1-00rel0/logical/cortexm0plus/verilog/cm0p_mpu.v
4b054567197e5f54d3bacf492271f4c9  AT590-BU-50000-r0p1-00rel0/logical/cortexm0plus/verilog/cm0p_matrix.v
1 {) p# t# y2 r0 e% O8 va436b897620bcd65a4f6f7d50345215e  AT590-BU-50000-r0p1-00rel0/logical/cortexm0plus/verilog/cm0p_top_clk.v

114142500

thanks! do you have source codes for M0? It‘s very great for sharing the code。my e-mail is 114142500@qq.com,thank you very much!