SVTC Technologies Selects Synopsys' Manufacturing Tools to Accelerate Time to Commercialization | 7/14/2010 |
Open-Silicon Integrates 50 DesignWare Interface and Analog IP Products with 100% Silicon Success | 7/7/2010 |
ARM, IBM, Samsung, GlobalFoundries and Synopsys Announce Delivery of 32-/ 28-nm HKMG Vertically Optimized Design Platform | 6/17/2010
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PrimeTime 2010 Scales Timing Analysis Beyond 500 Million Instances | 6/17/2010 |
Synopsys Delivers Optimized Lynx Design System for Common Platform 32/28-nm Technology | 6/17/20109 z% P4 Z0 H# D6 p$ b) y
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Synopsys Unveils Galaxy Characterization Solution for Standard Cells, Complex Macros and Memories | 6/17/2010 |
Synopsys Unveils StarRC Custom 3D Extraction Delivering 20X Speedup | 6/17/2010 |
Synopsys Delivers Comprehensive Custom Design Solution for TSMC Analog/ Mixed-Signal Reference Flow 1.0
) |5 A* {* w7 A+ W1 Z' E" n | 6/11/2010
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Synopsys to Acquire Virage Logic
/ d8 q- ~& q) ~- L; G( U3 d% W | 6/11/2010
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Synopsys and IEEE-ISTO Launch Technical Advisory Board to Evolve Interconnect Modeling Standard 7 F! P8 M& i1 A( d, q: c
| 6/7/2010
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Synopsys Announces Synphony HLS Support for Xilinx Virtex-6 FPGAs
0 [" j9 K* H/ ~) P2 G. z3 } | 6/4/2010
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Synopsys Press Publishes "The Ten Commandments for Effective Standards" 8 g! V2 G" x0 O6 }
| 6/4/2010
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Synopsys Collaborates with SMIC to Deliver USB Logo-Certified DesignWare USB 2.0 nanoPHY in SMIC's 65-nm LL Process Technology
! K: t& |0 ~ @8 R. A$ P5 D+ X/ a/ W | 5/13/2010 9 G0 r' _6 j$ Q2 A1 i2 s4 U
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Latest Synopsys IC Compiler Release Delivers More than 2X Speed-Up, Enhanced In-Design Technology and Production Support for 28/32nm
# a: v9 x! w% h* [! a6 Y/ e | 5/7/2010 ' X8 T: d' [, t q$ |1 a7 {4 e
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Synopsys Unveils Ethernet Controller IP with New Audio Video Bridging Feature ) ^/ U- v* {2 ?0 R' R8 q, {# \ s4 ]
| 5/7/2010
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Synopsys Launches Industrys First MIPI DigRF v4 IP 0 h% |+ N( w- e; P
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New Synopsys Universal DDR Controllers Improve Performance and Reduce Cost of Embedded DRAM Interfaces ; H: v: Z; J; Q, B1 Y5 O9 r. i
| 4/28/2010
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Synopsys Announces Support for Actel's New SmartFusion Intelligent Mixed-Signal FPGAs
% C. z) ?4 U$ W+ r! x9 K6 \' M: }& m( K | 4/22/2010 * \+ M" G1 D/ u
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Synopsys Introduces the HAPS-60 Series of Rapid Prototyping Systems
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Synopsys Expands IP OEM Partner Program with Two New Members ' j0 h/ {! i$ I3 o. _' o
| 4/14/2010 ; w! I+ f) C/ Z1 @5 f6 `' M
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Synopsys DesignWare DDR multiPHY IP Supports Six DDR Standards In a Single PHY
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Synopsys' DesignWare SuperSpeed USB 3.0 IP Receives USB-IF Certification
0 v2 y+ S S3 H1 R: E& P | 4/5/2010
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SiliconBlue Selects Synopsys as FPGA Synthesis Partner for Its iCE65 mobileFPGA Family
1 T. L4 _7 l6 z6 o | 4/1/2010
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Synopsys Galaxy Implementation Platform Enables First-pass Silicon Success on Infineon's 40-nm X-GOLD 626 Wireless Product 5 l2 a8 ^+ W0 q6 U# ~: t4 a
| 3/30/2010
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Design Compiler 2010 Doubles Productivity of Synthesis and Place-and-Route 3 ~' W X* C; G1 [1 D+ q8 x: D; Q
| 3/29/2010
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Nationz Technologies Achieves First-Pass Silicon Success with CustomSim Mixed-Signal and VCS Functional Verification Solutions
8 Q( g( X* d; ~( ? | 3/23/2010
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Renesas Technology Adopts Synopsys Proteus OPC for 28-nm Development
$ |. J" X9 \& | | 3/23/2010
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Synopsys Completes Acquisition of CoWare
& g5 C, ^4 L8 l }$ h/ Z | 3/23/2010
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IMEC and Synopsys Collaborate on 3D Stacked IC Development " B2 V+ ]" d+ V5 e# q- `: T9 G: v
| 3/10/2010
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Synopsys Galaxy Custom Designer Accelerates Analog/ Mixed-Signal Engineering Productivity with Built-in DRC Visualization and Correction * B, X* M5 K: s8 C
| 3/10/2010
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Yamaha Tapes Out Graphics Chip with Synopsys Design Compiler Graphical 0 D$ |8 h* C& y V% W8 {
| 2/9/2010 : p9 Z- e5 H% v# ?
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APAC IC Adopts Synopsys Galaxy Custom Designer Solution for Analog/ Mixed-Signal IC Design Services 2 c5 M, q0 p" j) f8 W8 e
| 2/8/2010 " k( l, G; r$ w) b
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Synopsys to Acquire CoWare , F$ l2 B1 U U1 }* x4 ~
| 2/8/2010 {* E7 ?2 o4 |0 G w) v. i
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Synopsys Acquires VaST Systems Technology ; Q5 _" Y4 `. F* {1 z
| 2/3/2010
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Synopsys Expands DesignWare IP Portfolio with MIPI IP Solutions & o5 ]6 E; b2 J% Y# D
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Synopsys Launches DesignWare HDMI 1.4 Tx/Rx Controller and PHY IP Solutions for 40-nm Process Technologies " ~8 H) M+ E1 v( J4 R& j
| 1/25/2010 / F- @1 Q, D6 w. O! D* D
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Toshiba Information Systems Standardizes on VMM-LP Low-Power Verification Methodology
+ v5 o+ E0 O) a/ P | 1/25/2010
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Synopsys Announces DesignWare Protocol Analyzer for Verification of SuperSpeed USB 3.0-based Designs 0 g( C$ x! z7 v, `: {3 X& Z6 x0 H' o
| 1/13/2010 5 Y& j; h' u5 J1 @4 T9 ~7 K, A- W5 r' Y+ S
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Synopsys Introduces SystemC TLM-2.0 SuperSpeed USB 3.0 Models 2 S! J6 H3 F. q1 O6 y% `
| 1/12/2010 : p: k* P: a, u9 f
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Synopsys Multicore Technology Speeds Timing Sign-Off by 2X
; a2 p" b7 v Y- d* x | 1/11/2010
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