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AMD Geode LX 800@0.9W處理器 II
Display Controller5 E$ I; r6 L" e4 ]7 O
■ Hardware frame buffer compression improves Unified9 i* P' Y( X6 c, x( {) p
Memory Architecture (UMA) memory efficiency
7 T2 P( e! R3 W4 i■ CRT resolutions supported:; A7 u4 f1 w1 ]/ Q; _5 j8 p
— Supports up to 1920x1440x32 bpp at 85 Hz9 S5 A8 O7 k: i' p! N
— Supports up to 1600x1200x32 bpp at 100 Hz
3 @( E$ ?9 [! U8 H/ {■ Supports up to 1600x1200x32 bpp at 60 Hz for TFT: d0 i$ U5 @' V" H, J
■ Standard Definition (SD) resolution for Video Output/ ~1 a8 Y* m* i3 b1 P9 U0 F
Port (VOP):
. ~9 G7 j8 q V* ], e0 P1 i— 720x482 at 59.94 Hz interlaced for NTSC
6 a3 {. P) o- `— 768x576 at 50 Hz interlaced for PAL
' c* h0 k8 j4 r& w■ High Definition (HD) resolution for Video Output Port* \. z& }$ P7 m$ ]7 i+ `
(VOP): d( Q/ n% u6 T; g$ }9 s
— Up to 1920x1080 at 30 Hz interlaced (1080i HD)
" v+ q! a u8 P, T(74.25 MHz)
& R- A# k2 Z6 q/ d8 h l: r3 A+ A R+ X— Up to 1280x720 at 60 Hz progressive (720p HD)+ E: ^0 K+ j6 Y* W3 V$ N
(74.25 MHz)
3 X/ R7 [* v) d) k2 e4 Z■ Supports down to 7.652 MHz Dot Clock (320x240- A" Y/ T0 B; s( v0 T1 Y# T
QVGA)- X' y3 P% p) w e% m0 p& d) F- n' F
■ Hardware VGA
9 w$ u7 ]5 F# S3 ]7 `■ Hardware supported 48x64 32-bit cursor with alpha
+ t( o- W8 m# W0 x! C- P* X( L( qblending8 P! s) K6 S3 m6 W
Video Processor2 X; V4 e' Q R% p/ A: k, m/ [6 a, U
■ Supports video scaling, mixing and VOP
; v5 _5 @' r. U: N% n■ Hardware video up/down scalar# y" R" D( d$ G+ E8 F# P. _
■ Graphics/video alpha blending and color key muxing7 ]: C4 H% i! E! d
■ Digital VOP (SD and HD) or TFT outputs* M$ w8 u9 X9 l( X* O- Q$ j
■ Legacy RGB mode
* W7 b; K( T2 D' ^6 B) x■ VOP supports SD and HD 480p, 480i, 720p, and 1080i9 B, o& v( q/ ]( T
■ VESA 1.1, 2.0 and BT.601 24-bit (out only), BT.656
7 z6 q$ W7 V; T) Kcompliant
) A( F: @+ _; @9 ^0 f- f4 UIntegrated Analog CRT DAC, System Clock PLLs and* M K9 c9 ?$ b" b2 U$ Q
Dot Clock PLL
- K( @. @/ z! ?■ Integrated Dot Clock PLL with up to 350 MHz clock7 x* Q: r) A v: x8 t
■ Integrated 3x8-bit DAC with up to 350 MHz sampling
: O( ]" k' v! M \0 l1 Z■ Integrated x86 core PLL6 `2 i- F$ N/ g9 q2 E, f
■ Memory PLL
" u0 D7 q4 i+ S: w6 fGeodeLink™ PCI Bridge; p# S: F Y$ g5 i: R" C7 c; P
■ PCI 2.2 compliant. n; e: Y4 H0 B' U% P
■ 3.3V signaling and 3.3V I/Os, Q4 [, {& ]- d- b
■ 33 to 66 MHz operation
' {2 Y9 z% d5 m+ `$ f■ 32-bit interface
0 @$ N; N: G- q a" X■ Supports virtual PCI headers for GeodeLink devices+ U: Q0 {8 x" @% Y: j& q& O
Video Input Port (VIP)7 G2 J4 h4 B, E/ z; T
■ VESA 1.1 and 2.0 compliant, 8 or 16-bit, V4 _+ b0 @; t+ ]
■ Video Blanking Interval (VBI) support
( ^9 Y' \9 i n8 D4 w: A■ 8 or 16-bit 80 MHz SD or HD capable
& d# B5 ]! L8 J! r( p0 a' j- wSecurity Block; f) w; T3 r4 L: o" Q( Y' e3 d
■ Serial EEPROM interface for 2K bit unique ID and AES
[. W7 _* k+ p8 P0 ]. X(Advanced Encryption Standard) hidden key storage
5 @0 S( ^9 C: R/ P(EEPROM optional inside package)
$ J& H, D. }, C( a8 H■ Electronic Code Book (ECB) or Cipher Block Chaining j, L V& j \/ p6 Z( R
(CBC)128-bit AES hardware support) B3 J* V2 M: J
■ True random number generator (TRNG) |
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