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Standard Cell 的 Data Prepare 的過程我會去做 axgDefineWireTracks# y7 d) D9 ^/ `* D1 @
然後再做 axgCheckWireTrack 來 check wire track, 但是做完 axgCheckWireTrack _( N% a5 y! x$ r; n
之後卻有如下之 Meaasge:
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******** Pin Access Analysis *******
+ l! O4 U- R9 v' N4 M; [, b** # Cell Masters = 1000' ~3 g4 [' D. j+ d, B5 Y
** # Ports (logical) = 2500
: N5 E, ?! X) _3 L** # Pins (physical) = 2500- e) B8 K$ }! @% m% ~
** # Pins with no good access point on Grid (V&H) = 5 ( 0%)% p# I9 j9 P: |1 g0 {' Q6 w
** # Pins with no good access point on Ver-Grid = 5 ( 0%)
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請問下面這兩句是代表什麼意思呢?
' r1 B$ W1 j) q0 w0 f** # Pins with no good access point on Grid (V&H) = 5 ( 0%)
! G* `. Z& b# @" s0 L8 Z2 Z** # Pins with no good access point on Ver-Grid = 5 ( 0%)
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若是代表有錯誤的話是否要 Fix 呢? |
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