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Standard Cell 的 Data Prepare 的過程我會去做 axgDefineWireTracks; u) A( |/ w( v! r M- s
然後再做 axgCheckWireTrack 來 check wire track, 但是做完 axgCheckWireTrack - f4 \/ w% F6 z; g
之後卻有如下之 Meaasge:
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******** Pin Access Analysis *******
5 X1 f+ q5 K+ t/ @( a' R** # Cell Masters = 1000
( ?) X% J/ [! O/ e- E1 n* z** # Ports (logical) = 2500
* |- ?3 C! t) w4 P9 V8 E** # Pins (physical) = 2500; z1 q0 j$ L- N0 z, W
** # Pins with no good access point on Grid (V&H) = 5 ( 0%)- j# F$ V. B- y. n& }
** # Pins with no good access point on Ver-Grid = 5 ( 0%)
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請問下面這兩句是代表什麼意思呢?
( L# C5 Q% Q8 B4 a2 }# {2 {** # Pins with no good access point on Grid (V&H) = 5 ( 0%)
! a# ?, i$ o: j/ u/ J& e2 Y** # Pins with no good access point on Ver-Grid = 5 ( 0%)
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若是代表有錯誤的話是否要 Fix 呢? |
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