STD Cell Data Prepare 中 wire track 的問題?

hgby2209

Standard Cell 的 Data Prepare 的過程我會去做 axgDefineWireTracks
9 U) ^$ X1 s0 s- k3 K" |然後再做 axgCheckWireTrack 來 check wire track, 但是做完 axgCheckWireTrack  
( f2 G* B" B7 N3 U! ?4 B" Y之後卻有如下之 Meaasge:

4 c6 D; ?- e$ j. Z3 l$ Y******** Pin Access Analysis *******
** # Cell Masters    =  1000
8 ^. e. L8 d) S/ j$ [' G/ B( F** # Ports (logical) = 2500
6 [$ ?/ O8 c0 ?** # Pins (physical) = 2500
% Y- d+ r' @$ V& P- X' @** # Pins with no good access point on Grid (V&H) =   5 ( 0%)
- {, m7 ~* o) M  y** # Pins with no good access point on Ver-Grid =    5 ( 0%)

請問下面這兩句是代表什麼意思呢?
** # Pins with no good access point on Grid (V&H) =   5 ( 0%)
% L9 y. C. B) ]8 S** # Pins with no good access point on Ver-Grid =    5 ( 0%)

: ^: Q6 b, B4 T$ `1 ]若是代表有錯誤的話是否要 Fix 呢?